Linear Voltage Regulator (LDO)

Overview

Most Formula Student electronics run on a 12 V or 24 V GLV rail, but microcontrollers and logic ICs typically require 3.3 V or 5 V. A Linear Voltage Regulator converts a higher, potentially noisy input voltage to a clean, stable output voltage with minimal external components.

Most linear regulators these days are Low Drop Out (LDO) Voltage, which means the minimum difference between output and input voltage is small - less than 2V usually.

Linear LDOs are preferred over switching regulators in low-power applications where simplicity and low noise matter more than efficiency. The tradeoff is that the voltage difference between input and output is dissipated as heat, so power dissipation must be checked against the package rating.

Circuit description

The input capacitor $C_\text{in}$ is placed close to the LDO input pin and stabilises the input voltage against wire inductance and load transients. The output capacitor $C_\text{out}$ is placed close to the output pin and is required for loop stability in most LDO designs. The regulated output voltage is set by the device variant (for fixed-output LDOs) or by an external resistor divider on the adjust pin (for adjustable LDOs).

Check the datasheet for minimum required capacitor values and ESR limits. Some older LDOs (such as the LM317) require a minimum output capacitor ESR for stability, which can make them incompatible with low-ESR ceramic capacitors without an additional series resistor.

Pre-Baked Solutions

Output Current (up to)	Acceptable Vin	Output Voltage	Max Power Dissipation P = (Vout - Vin) / I	Part #
1 A	12V	3.3 V	800mW	AMS1117-3.3
1 A	12V	5.0 V	800mW	AMS1117-5.0

Design notes

Dropout voltage: The minimum voltage difference $V_{IN} - V_{OUT}$ required for regulation. At the GLV minimum (e.g. 10 V on a nominally 12 V system), confirm the input still exceeds $V_{OUT}$ plus the dropout voltage.
Power dissipation: The LDO dissipates $P = (V_{IN} - V_{OUT}) \times I_{OUT}$ as heat. Regulators in SOT-23 or SOT-89 packages typically handle 200 to 500 mW. Exceeding the thermal limit causes the device to enter thermal shutdown or fail permanently.

P = (V_{IN} - V_{OUT}) \times I_{OUT}

Quiescent current: LDOs draw a small quiescent current from the input even at no load. This is relevant for always-on circuits powered from a battery.
Capacitor selection: Use ceramic capacitors (X5R or X7R) for $C_\text{in}$ and $C_\text{out}$ . Check the datasheet for the minimum capacitance and ESR range. 1 µF to 10 µF is typical for each. Sometimes tantalum capacitors are specified - avoid these in favour of ceramics. Tantalum capacitors have more destructive failure-modes.
Enable pin: Some LDOs include an enable pin that can be driven from a GPIO or shutdown signal. This allows the MCU supply to be cut under fault conditions.

Gotchas

Placing $C_\text{in}$ or $C_\text{out}$ far from the LDO pins adds parasitic inductance from the PCB trace and reduces their effectiveness. Place them within a few millimetres of the device pins.
Do not assume a higher-rated LDO can be substituted without checking the stability requirements. Some devices require a minimum load current to regulate correctly.
At large $V_{IN} - V_{OUT}$ differentials with moderate current (e.g. 12 V to 3.3 V at 200 mA), the power dissipation is 1.74 W, which exceeds the rating of most small SMD packages. Either use a larger package, add a heatsink, or consider a two-stage regulation scheme where a buck converter pre-regulates to 5 V before the LDO.